Efficiency of Cryptography for Multi-Algorithm Computation on Dedicated Structures

Currently, the more efficient implementations for cryptographic engines are dedicated structures and only allow processing a single algorithm. On the other hand the existing multi-algorithm processors impose significantly higher costs, resulting in low efficiency structures. One possible solution is to use reconfigurable systems. However reconfigurable technologies impose additional costs, both in efficiency, as well as in the reconfiguration process itself. The solution herein proposed considers the support for multi-algorithm by looking into the common operations and merging there computation into common components. The obtained results suggest that by proper component reuse and adequate scheduling, efficiency and cost metrics identical to those of dedicated structures can be achieved, while supporting the computation of multiple algorithms. As future perspective, the implementation of security codes against Differential Fault Analysis, in such multi-algorithm architectures, is studied. Keywords—multiple algorithms, FPGA, AES, CLEFIA, security codes, circuits & systems, hardware design, Differential Fault Analysis attacks